Adc Interface - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

Reference Manual
LESENSE - Low Energy Sensor Interface

28.3.12 ADC Interface

The LESENSE module can be configured to trigger conversions on ADC0 and use data from ADC0 to evaluate sensor status. In order
to do this, the scan mode of the ADC has to be configured. When the sample delay configured in CHx_TIMING_SAMPLEDLY has
expired, LESENSE will initiate an ADC sample. The active LESENSE channel determines which ADC0 channel to be sampled, where
LESENSE channel X corresponds to ADC0 scan channel X.
28.3.13 DMA Requests
LESENSE issues a DMA request when the result buffer is either full or half full, depending on the configuration of BUFIDL in CTRL. The
request is cleared when the buffer level drops below the threshold defined in BUFIDL. A single DMA request is also set whenever there
is unread data in the buffer. DMAWU in CTRL configures at which buffer level LESENSE should wake-up the DMA when in EM2.
Note:
The DMA controller should always fetch data from the BUFDATA register.
28.3.14 PRS Output
LESENSE is an asynchronous PRS producer and has twenty PRS outputs. The decoder has four outputs and in addition, all bits in the
SCANRES register are available as PRS outputs. For further information on the decoder PRS output, refer to 28.3.7 Decoder.
28.3.15 RAM
LESENSE includes a RAM block used for storage of configuration and results. Registers mapped to the RAM include: STx_TCONFA,
STx_TCONFB, BUFx_DATA, BUFDATA, CHx_TIMING, CHx_INTERACT, and CHx_EVAL. These registers have unknown value out of
reset and have to be initialized before use.
Note:
Read-modify-write operations on uninitialized RAM register produces undefined values.
28.3.16 Application Examples
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