11.5.10 CMU_CALCTRL - Calibration Control Register
Offset
0x050
Reset
Access
Name
Bit
Name
31:28
Reserved
27:24
PRSDOWNSEL
Select PRS input for PRS based calibration. Only change when calibration circuit is off.
Value
0
1
2
3
4
5
6
7
8
9
10
11
23:20
Reserved
19:16
PRSUPSEL
Select PRS input for PRS based calibration. Only change when calibration circuit is off.
Value
0
1
2
3
4
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Reset
Access
Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x0
RW
PRS Select for PRS Input When Selected in DOWNSEL
Mode
Description
PRSCH0
PRS Channel 0 selected as input
PRSCH1
PRS Channel 1 selected as input
PRSCH2
PRS Channel 2 selected as input
PRSCH3
PRS Channel 3 selected as input
PRSCH4
PRS Channel 4 selected as input
PRSCH5
PRS Channel 5 selected as input
PRSCH6
PRS Channel 6 selected as input
PRSCH7
PRS Channel 7 selected as input
PRSCH8
PRS Channel 8 selected as input
PRSCH9
PRS Channel 9 selected as input
PRSCH10
PRS Channel 10 selected as input
PRSCH11
PRS Channel 11 selected as input
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0x0
RW
PRS Select for PRS Input When Selected in UPSEL
Mode
Description
PRSCH0
PRS Channel 0 selected as input
PRSCH1
PRS Channel 1 selected as input
PRSCH2
PRS Channel 2 selected as input
PRSCH3
PRS Channel 3 selected as input
PRSCH4
PRS Channel 4 selected as input
Bit Position
Reference Manual
CMU - Clock Management Unit
1.2 Conven-
1.2 Conven-
Rev. 1.1 | 324
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