Vdacn_Ien - Interrupt Enable Register - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

23.5.9 VDACn_IEN - Interrupt Enable Register

Offset
0x020
Reset
Access
Name
Bit Name
31:30 Reserved
29 OPA1OUTVALID
Enable/disable the OPA1OUTVALID interrupt
28 OPA0OUTVALID
Enable/disable the OPA0OUTVALID interrupt
27:22 Reserved
21 OPA1PRSTIME-
DERR
Enable/disable the OPA1PRSTIMEDERR interrupt
20 OPA0PRSTIME-
DERR
Enable/disable the OPA0PRSTIMEDERR interrupt
19:18 Reserved
17 OPA1APORTCON-
FLICT
Enable/disable the OPA1APORTCONFLICT interrupt
16 OPA0APORTCON-
FLICT
Enable/disable the OPA0APORTCONFLICT interrupt
15 EM23ERR
Enable/disable the EM23ERR interrupt
14:8 Reserved
7 CH1BL
Enable/disable the CH1BL interrupt
silabs.com | Building a more connected world.
Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 RW OPA1OUTVALID Interrupt Enable
0 RW OPA0OUTVALID Interrupt Enable
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 RW OPA1PRSTIMEDERR Interrupt Enable
0 RW OPA0PRSTIMEDERR Interrupt Enable
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 RW OPA1APORTCONFLICT Interrupt Enable
0 RW OPA0APORTCONFLICT Interrupt Enable
0 RW EM23ERR Interrupt Enable
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 RW CH1BL Interrupt Enable
Bit Position
Reference Manual
VDAC - Digital to Analog Converter
1.2 Conven-
1.2 Conven-
1.2 Conven-
1.2 Conven-
Rev. 1.1 | 780