Exdma Source Address Register (Edsar); Exdma Destination Address Register (Eddar) - Hitachi H8S/2378, H8S/2378R Series Hardware Manual

8.3.1

EXDMA Source Address Register (EDSAR)

EDSAR is a 32-bit readable/writable register that specifies the transfer source address. An address
update function is provided that updates the register contents to the next transfer source address
each time transfer processing is performed. In single address mode, the EDSAR value is ignored
when a device with '$&. is specified as the transfer source.
The upper 8 bits of EDSAR are reserved; they are always read as 0 and cannot be modified. Only
0 should be written to these bits.
EDSAR can be read at all times by the CPU. When reading EDSAR for a channel on which
EXDMA transfer processing is in progress, a longword-size read must be executed. Do not write
to EDSAR for a channel on which EXDMA transfer is in progress. The initial values of EDSAR
are undefined.
8.3.2

EXDMA Destination Address Register (EDDAR)

EDDAR is a 32-bit readable/writable register that specifies the transfer destination address. An
address update function is provided that updates the register contents to the next transfer
destination address each time transfer processing is performed. In single address mode, the
EDDAR value is ignored when a device with '$&. is specified as the transfer destination.
The upper 8 bits of EDDAR are reserved; they are always read as 0 and cannot be modified. Only
0 should be written to these bits.
EDDAR can be read at all times by the CPU. When reading EDDAR for a channel on which
EXDMA transfer processing is in progress, a longword-size read must be executed. Do not write
to EDDAR for a channel on which EXDMA transfer is in progress. The initial values of EDDAR
are undefined.
Rev. 1.0, 09/01, page 320 of 904