C Bus Control Register A (Iccra) - Hitachi H8S/2378, H8S/2378R Series Hardware Manual

• I
2
C bus status register_0 (ICSR_0)
• I
2
C bus slave address register_0 (SAR_0)
• I
2
C bus transmit data register_0 (ICDRT_0)
• I
2
C bus receive data register_0 (ICDRR_0)
• I
2
C bus shift register_0 (ICDRS_0)
• I
2
C bus control register A_1 (ICCRA_1)
• I
2
C bus control register B_1 (ICCRB_1)
• I
2
C bus mode register_1 (ICMR_1)
• I
2
C bus interrupt enable register_1 (ICIER_1)
• I
2
C bus status register_1 (ICSR_1)
• I
2
C bus slave address register_1 (SAR_1)
• I
2
C bus transmit data register_1 (ICDRT_1)
• I
2
C bus receive data register_1 (ICDRR_1)
• I
2
C bus shift register_1 (ICDRS_1)
2
16.3.1 I

C Bus Control Register A (ICCRA)

ICCRA is an 8-bit readable/writable register that enables or disables the I
transmission or reception, and selects master or slave mode, transmission or reception, and
transfer clock frequency in master mode.
Rev. 1.0, 09/01, page 710 of 904
2
C bus interface, controls