Hitachi H8S/2378, H8S/2378R Series Hardware Manual page 864

Register Name
Read strobe timing control register
Chip select assertion period control
registers H
Chip select assertion period control
register L
Burst ROM interface control register H
Burst ROM interface control register L
Bus control register
RAM emulation register
DRAM control register L
DRAM access control register H
DRAM access control register L
Refresh control register
Refresh timer counter
Refresh time constant register
Memory address register 0AH
Memory address register 0AL
I/O address register 0A
Transfer count register 0A
Memory address register 0BH
Memory address register 0BL
I/O address register 0B
Transfer count register 0B
Memory address register 1AH
Memory address register 1AL
I/O address register 1A
Transfer count register 1A
Memory address register 1BH
Memory address register 1BL
Rev. 1.0, 09/01, page 820 of 904
Abbrevia-
tion Bit No.
RDNCR 8
CSACRH 8
CSACRL 8
BROMCRH 8
BROMCRL 8
BCR 16
RAMER 8
DRAMCR 16
DRACCRH 8
DRACCRL 8
REFCR 16
RTCNT 8
RTCOR 8
MAR_0AH 16
MAR_0AL 16
IOAR_0A 16
ETCR_0A 16
MAR_0BH 16
MAR_0BL 16
IOAR_0B 16
ETCR_0B 16
MAR_1AH 16
MAR_1AL 16
IOAR_1A 16
ETCR_1A 16
MAR_1BH 16
MAR_1BL 16
Address Module
H'FEC6 BSC
H'FEC8 BSC
H'FEC9 BSC
H'FECA BSC
H'FECB BSC
H'FECC BSC
H'FECE FLASH
H'FED0 BSC
H'FED2 BSC
H'FED3 BSC
H'FED4 BSC
H'FED6 BSC
H'FED7 BSC
H'FEE0 DMAC
H'FEE2 DMAC
H'FEE4 DMAC
H'FEE6 DMAC
H'FEE8 DMAC
H'FEEA DMAC
H'FEEC DMAC
H'FEEE DMAC
H'FEF0 DMAC
H'FEF2 DMAC
H'FEF4 DMAC
H'FEF6 DMAC
H'FEF8 DMAC
H'FEFA DMAC
Data Access
Width States
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2
16 2