3.2
Register Descriptions
The following registers are related to the operating mode.
• Mode control register (MDCR)
• System control register (SYSCR)
3.2.1
Mode Control Register (MDCR)
MDCR monitors the current operating mode of the H8S/2378 Series chip.
Bit
Bit Name
Initial Value
−
7
0
−
6
0
−
5
0
−
4
0
−
3
0
−
2
MDS2
−
1
MDS1
−
0
MDS0
Note: * Determined by pins MD2 to MD0.
3.2.2
System Control Register (SYSCR)
SYSCR controls CPU access to the flash memory control registers, sets external bus mode, and
enables or disables on-chip RAM.
Rev. 1.0, 09/01, page 54 of 904
R/W
−
−
−
−
−
R
*
R
*
R
*
Descriptions
Reserved
These bits are always read as 0 and cannot be
modified.
Mode Select 2 to 0
These bits indicate the input levels at pins MD2 to MD0
(the current operating mode). Bits MDS2 to MDS0
correspond to MD2 to MD0. MDS2 to MDS0 are read-
only bits and they cannot be written to. The mode pin
(MD2 to MD0) input levels are latched into these bits
when MDCR is read. These latches are canceled by a
reset.