Section 16 I C Bus Interface2 (Iic2) (Option); Features - Hitachi H8S/2378, H8S/2378R Series Hardware Manual

Section 16 I
2
An I C bus interface is an option. When using the optional functions, take notice of the following
items:
1. For the mask ROM version, 'W' is added to the model name of the product that uses optional
functions.
For example: HD6432268WTE
2. For the F-ZTAT version, product model names do not depend on optional functions. When
using optional functions, contact the Hitachi sales office.
This LSI has a two-channel I
2
The I C bus interface conforms to and provides a subset of the Philips I
interface functions. The register configuration that controls the I
Philips configuration, however.
Figure 21.1 shows a block diagram of the I
Figure 21.2 shows an example of I/O pin connections to external circuits.
16.1

Features

• Continuous transmission/reception
Since the shift register, transmit data register, and receive data register are independent from
each other, the continuous transmission/reception can be performed.
• Start and stop conditions generated automatically in master mode
• Selection of acknowledge output levels when receiving
• Automatic loading of acknowledge bit when transmitting
• Bit synchronization/wait function
In master mode, the state of SCL is monitored per bit, and the timing is synchronized
automatically
If transmission/reception is not yet possible, set the SCL to low until preparations are
completed.
• Six interrupt sources
 Transmit-data-empty (including slave-address match), transmit-end, receive-data-full
(including slave-address match), arbitration lost, NACK detection, and stop condition
detection
• Direct bus drive
 Two pins, SCL and SDA pins function as NMOS open-drain outputs.
2
C Bus Interface2 (IIC2) (Option)
2
C bus interface,
2
C bus interface2.
2
C bus (inter-IC bus)
2
C bus differs partly from the
Rev. 1.0, 09/01, page 707 of 904