Hitachi H8S/2378, H8S/2378R Series Hardware Manual page 911

ø
A23 to A0
to
Read
(RDNn = 1)
D15 to D0
Read
(RDNn = 0)
D15 to D0
,
Write
D15 to D0
,
to
Figure 24.11 Basic Bus Timing: Three-State Access (&6
Th
t
AD
t
CSD1
t
AS1
t
ASD
t
AS3
t
AS3
t
AS4
t
WDS3
t
WDD
t
DACD1
t
EDACD1
T1 T2
t
t
RSD1
RSD1
t
AC6
t
RSD1
t
AC4
t
WRD2
t
WRD1
t
WSW2
&6 Assertion Period Extended)
&6 &6
T3 Tt
t
t
AH1
ASD
t
AH3
t t
RDS1 RDH1
t
t AH2
RSD2
t t
RDS2 RDH2
t
AH3
t
WDH3
Rev. 1.0, 09/01, page 867 of 904
t
DACD2
t
EDACD2