TE bit
SCK output pin
TxD output pin
Port input/output
Port
Figure 15.37 Port Pin States during Mode Transition
TE bit
SCK output pin
TxD output pin
Port input/output
Port
Note: * Initialized by software standby.
Figure 15.38 Port Pin States during Mode Transition
Start of transmission
High output
Start
SCI TxD output
(Internal Clock, Asynchronous Transmission)
Start of transmission
Marking output
SCI TxD output
(Internal Clock, Synchronous Transmission)
Transition
End of
to software
transmission
standby
Stop
Port input/output
Transition
End of
to software
standby
transmission
Port input/output
Last TxD bit held
Port input/output
Rev. 1.0, 09/01, page 705 of 904
Exit from
software
standby
Port input/output
High output
SCI TxD
Port
output
Exit from
software
standby
High output*
SCI TxD
Port
output