Hitachi H8S/2378, H8S/2378R Series Hardware Manual page 405

Figures 8.31 to 8.34 show operation timing examples for various conditions.
ø pin
Bus cycle
CPU cycle CPU cycle
CPU
External External
space space
operation
EDA bit
1
Figure 8.31 Auto Request/Burst Mode/Normal Transfer Mode
ø pin
Bus cycle CPU cycle CPU cycle
CPU
External External
operation space space
Figure 8.32 Auto Request/Burst Mode/Normal Transfer Mode
EXDMA EXDMA EXDMA
read write
External
space
(CPU Cycles/Dual Address Mode/BGUP = 0)
1 bus cycle
EXDMA EXDMA
CPU cycle
read write
External
space
(CPU Cycles/Dual Address Mode/BGUP = 1)
EXDMA
Repeated
read write
EXDMA EXDMA
read write
External
space
Rev. 1.0, 09/01, page 361 of 904
Last transfer cycle
EXDMA EXDMA
CPU cycle
read write
0
1 bus cycle
EXDMA EXDMA
CPU cycle
read write