Address Control Register (Adrcr) - Hitachi H8/3062 Hardware Manual

6.2.7

Address Control Register (ADRCR)

ADRCR is an 8-bit readable/writable register that selects either address update mode 1 or address
update mode 2 as the address output method.
Bit
7
—
Initial value 1
Read/Write —
ADRCR is initialized to H'FF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 7 to 1—Reserved: Read-only bits, always read as 1.
Bit 0—Address Control (ADRCTL): Selects the address output method.
Bit 0
ADRCTL Description
0 Address update mode 2 is selected
1 Address update mode 1 is selected
This register is not provided in the H8/3062F-ZTAT (HD64F3062). If this space is accessed in the
H8/3062F-ZTAT (HD64F3062), a write access will be invalid and a read access will always return
H'FF.
136
6 5
— —
1 1
— —
Reserved bits
4 3
—
—
1 1
— —
2 1
— — ADRCTL
1 1
— —
Address control
Selects address
update mode 1 or
address update
mode 2
(Initial value)
0
1
R/W