Block Diagram - Hitachi H8S/2378, H8S/2378R Series Hardware Manual

1.2

Block Diagram

MD2
MD1
MD0
DCTL
EXTAL
XTAL
EMLE
NMI
PF7/øF
PF6/
PF5/
PF4/
PF3/
PF2/ / /DQML *
*
PF1/ / /DQMU
PF0/
PG6/
PG5/
PG4/
*
PG3/ / /
PG2/ / /
PG1/
PG0/
P65/TMO1/( )/
P64/TMO0/( )/
P63/TMCI1/( )/
P62/TMCI0/( )/
P61/TMRI1/( )/
P60/TMRI0/( )/
P85/( )/SCK3/
P84/( )/
P83/( )/RXD3/
P82/( )/
P81/( )/TXD3/
P80/( )/
Note: Available only for the H8S/2378R series.
Rev. 1.0, 09/01, page 2 of 904
Port D
PLL
H8S/2000 CPU
Clock
pulse
generator
Interrupt controller
ROM*
(Flash memory)
RAM
TPU x 6 channels
PPG
TMR x 2 channels
Port 1 Port 2
Figure 1.1 Internal Block Diagram
Port E
DTC
DMAC
EXDMAC
WDT
SCI x 5 channels
IIC bus interface(option)
8-bit D/A converter
10-bit A/D converter
Port 4
PA7/A23/
PA6/A22/
PA5/A21/
PA4/A20/
PA3/A19
PA2/A18
PA1/A17
PA0/A16
PB7/A15
PB6/A14
PB5/A13
PB4/A12
PB3/A11
PB2/A10
PB1/A9
PB0/A8
PC7/A7
PC6/A6
PC5/A5
PC4/A4
PC3/A3
PC2/A2
PC1/A1
PC0/A0
*
P35/SCK1/SCL0/( )/(CKE)
P34/SCK0/SCK4/SDA0
P33/RxD1/SCL1
P32/RxD0/IrRxD/SDA1
P31/TxD1
P30/TxD0/IrTxD
P53/ //
P52/SCK2/
P51/RxD2/
P50/TxD2/
Port 9 Port H