Port E Data Register (Pedr); Port E Register (Porte) - Hitachi H8S/2378, H8S/2378R Series Hardware Manual

10.13.2 Port E Data Register (PEDR)

PEDR stores output data for the port E pins.
Bit Bit Name
7 PE7DR
6 PE6DR
5 PE5DR
4 PE4DR
3 PE3DR
2 PE2DR
1 PE1DR
0 PE0DR

10.13.3 Port E Register (PORTE)

PORTE shows port E pin states.
PORTE cannot be modified.
Bit Bit Name
7 PE7
6 PE6
5 PE5
4 PE4
3 PE3
2 PE2
1 PE1
0 PE0
Note: Determined by the states of pins PE7 to PE0.
Rev. 1.0, 09/01, page 472 of 904
Initial Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
Initial Value R/W
R
—*
R
—*
R
—*
R
—*
R
—*
R
—*
R
—*
R
—*
Description
Output data for a pin is stored when the pin function
is specified to a general purpose I/O.
Description
If a port E read is performed while PEDDR bits are
set to 1, the PEDR values are read. If a port E read
is performed while PEDDR bits are cleared to 0, the
pin states are read.