Smart Card Mode Register (Scmr) - Hitachi H8S/2378, H8S/2378R Series Hardware Manual

Bit Bit Name
1 MPB
0 MPBT
Note: * Only 0 can be written, to clear the flag.
15.3.8

Smart Card Mode Register (SCMR)

SCMR selects Smart Card interface mode and its format.
Bit Bit Name
7 —
to
4
3 SDIR
2 SINV
1 —
Initial Value R/W
0 R
0 R/W
Initial Value R/W
1 —
0 R/W
0 R/W
1 —
Description
[Clearing conditions]
•
When 0 is written to TEND after reading TEND
= 1
•
When the DMAC or DTC is activated by a TXI
interrupt and writes data to TDR
Multiprocessor Bit
This bit is not used in Smart Card interface mode.
Multiprocessor Bit Transfer
Write 0 to this bit in Smart Card interface mode.
Description
Reserved
These bits are always read as 1.
Smart Card Data Transfer Direction
Selects the serial/parallel conversion format.
0: LSB-first in transfer
1: MSB-first in transfer
The bit setting is valid only when the transfer data
format is 8 bits. For 7-bit data, LSB-first is fixed.
Smart Card Data Invert
Specifies inversion of the data logic level. The
SINV bit does not affect the logic level of the parity
bit. To invert the parity bit, invert the O/( bit in
SMR.
0: TDR contents are transmitted as they are.
Receive data is stored as it is in RDR.
1: TDR contents are inverted before being
transmitted. Receive data is stored in inverted
form in RDR.
Reserved
This bit is always read as 1.
Rev. 1.0, 09/01, page 645 of 904