Operating Mode Descriptions; Mode 1; Mode 2; Mode 3 - Hitachi H8S/2378, H8S/2378R Series Hardware Manual

3.3

Operating Mode Descriptions

3.3.1

Mode 1

The CPU can access a 16-Mbyte address space in advanced mode. The on-chip ROM is disabled.
Ports A, B, and C function as an address bus, ports D and E function as a data bus, and parts of
ports F, G, and H carry bus control signals.
The initial bus mode after a reset is 16 bits, with 16-bit access to all areas. However, if 8-bit access
is designated for all areas by the bus controller, the bus mode switches to 8 bits.
3.3.2

Mode 2

The CPU can access a 16-Mbyte address space in advanced mode. The on-chip ROM is disabled.
Ports A, B, and C function as an address bus, ports D and E function as a data bus, and parts of
ports F, G, and H carry bus control signals.
The initial bus mode after a reset is 8 bits, with 8-bit access to all areas. However, if 16-bit access
is designated for any one of the areas by the bus controller, the bus mode switches to 16 bits and
port E functions as a data bus.
3.3.3

Mode 3

This mode is a boot mode of the flash memory. This mode is the same as mode 7, except for the
programming and erasure on the flash memory.
3.3.4

Mode 4

The CPU can access a 16-Mbyte address space in advanced mode. The on-chip ROM is enabled.
Ports A, B, and C function as input ports immediately after a reset, but can be set to function as an
address bus. For details, see section 10, I/O Ports. Ports D and E function as a data bus, and parts
of ports F, G, and H carry bus control signals.
The initial bus mode after a reset is 8 bits, with 8-bit access to all areas. The program in the on-
chip ROM connected to the first half of area 0 is executed. However, if 16-bit access is designated
for any area by the bus controller, the bus mode switches to 16 bits and port E functions as a data
bus. User program mode is entered by setting 1 to the SWE bit of FLMCR1.
3.3.5

Mode 5

The CPU can access a 16-Mbyte address space in advanced mode. The on-chip ROM is enabled.
Rev. 1.0, 09/01, page 56 of 904