Hitachi H8S/2378, H8S/2378R Series Hardware Manual page 524

/&$6 /&$6/'40/ /&$6 '40/ '40/* '40/
PF2//&$6
The pin function is switched as shown below according to the combination of the operating mode,
bit EXPE, bits RMTS2 to RMTS0 in DRAMCR, bits ABW5 to ABW2 in ABWCR, and bit
PF2DDR.
Operating
mode
EXPE
Areas Any
2 to 5 DRAM /
synchr-
onous
DRAM
space
area is
16-bit
bus
space
PF2DDR —
/&$6/
Pin function
('40/)
2
output
Notes: 1. ,5448 interrupt input when bit ITS15 is cleared to 0 in ITSR.
2. Not used in H8S/2378 series.
Rev. 1.0, 09/01, page 480 of 904
,5448 ,5448 ,5448
2
/,5448
1, 2, 4, 5, 6
—
All
DRAM/synchro-
*2
nous DRAM
space areas
*2
are 8-bit bus
space, or areas
2 to 5 are all
normal space
0 1
PF2 PF2
*
input output
,5448 interrupt input*
2
3* , 7
0
— Any
DRAM/
synchr-
onous
DRAM
space
area is
16-bit
bus
space
0 1 —
/&$6/
PF2 PF2
input output ('40/)
*2
output
1
All
DRAM/synchro-
*2
nous DRAM
space areas
*2
are 8-bit bus
space, or areas
2 to 5 are all
normal space
0 1
PF2 PF2
input output