Operation; C Bus Format - Hitachi H8S/2378, H8S/2378R Series Hardware Manual

16 bit single-chip microcomputer
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16.4

Operation

2
16.4.1
I

C Bus Format

Figure 16.3 shows the I
following a start condition always consists of 8 bits.
2
(a) I
C bus format (FS = 0)
S
SLA
R/
1
7
1
1
2
(b) I
C bus format (start condition retransmission, FS = 0)
S
SLA
R/
1
7
1
1
SDA
SCL
S
Legend
S:
Start condition. The master device drives SDA from high to low while SCL is high.
SLA: Slave address
R/::
Indicates the direction of data transfer: from the slave device to the master device when
R/: is 1, or from the master device to the slave device when R/: is 0.
A:
Acknowledge. The receiving device drives SDA to low.
DATA: Transferred data
Rev. 1.0, 09/01, page 720 of 904
2
C bus formats. Figure 16.4 shows the I
A
DATA
A
1
n
1
A
DATA
1
n1
m1
Figure 16.3 I
1-7
8
9
SLA
R/
A
Figure 16.4 I
2
A/
P
1
1
m
A/
S
SLA
1
1
7
1
n1 and n2: transfer bit count (n1 and n2 = 1 to 8)
m1 and m2: transfer frame count (m1 and m2 ≥ 1)
2
C Bus Formats
1-7
8
9
DATA
A
2
C Bus Timing
C bus timing. The first frame
n: transfer bit count
(n = 1 to 8)
m: transfer frame count
(m ≥ 1)
R/
A
DATA
1
1
n2
m2
1-7
8
9
DATA
A
A/
P
1
1
P

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