Hitachi H8S/2378, H8S/2378R Series Hardware Manual page 847

16 bit single-chip microcomputer
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* The active or halted state can be selected by means of the MSTP0 bit in MSTPCR.
Reset state
High-speel mode
(Internal clock is PLL
circuit output clock)
SCK2 to
SCK0 = 0
Clock division
Program execution state
: Transition after exception handling
Notes: 1. NMI,
(8-bit timer interrupts are valid when MSTP0 = 0.)
2. NMI,
(IRQ0 to IRQ15 are valid when the corresponding bit in SSIER is 1.)
• When a transition is made between modes by means of an interrupt, the transition cannot be
made on interrupt source generation alone. Ensure that interrupt handling is performed after
accepting the interrupt request.
• From any state, a transition to hardware standby mode occurs when
• From any state except hardware standby mode, a transition to the reset state occurs when
is driven low.
pin = high
SCK2 to
SCK0 ≠ 0
mode
to
, 8-bit timer interrupts, watchdog timer interrupts.
to
Figure 22.1 Mode Transitions
pin = high
pin = low
SLEEP
instruction
MSTPCR =
Any interrupt
H'FFFF (H'FFFE),
EXMSTPCR = H'FFFF,
SLEEP
SSBY = 0
instruction
module-clocks-stop
*1
Interrupt
SLEEP
instruction
External
*2
interrupt
Program-halted state
: Power- down mode
Rev. 1.0, 09/01, page 803 of 904
pin = low
Hardware
standby mode
SSBY = 0
Sleep mode
All
mode
SSBY = 1
Software
standby mode
is driven low.

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