Hitachi H8S/2378, H8S/2378R Series Hardware Manual page 406

ø pin
Bus cycle CPU cycle CPU cycle
External External
CPU
space space
operation
Figure 8.33 Auto Request/Burst Mode/Normal Transfer Mode
ø pin
Bus cycle
Bus release
Original
channel
Original
channel
Other
channel
transfer
request
( )
Figure 8.34 Auto Request/Burst Mode/Normal Transfer Mode
(Contention with Another Channel/Single Address Mode)
External Request/Cycle Steal Mode/Normal Transfer Mode: In external request mode, an
EXDMA transfer cycle is started a minimum of three cycles after a transfer request is accepted.
The next transfer request is accepted after the end of a one-transfer-unit EXDMA cycle. For
external bus space CPU cycles, at least two bus cycles are generated before the next EXDMA
cycle.
Rev. 1.0, 09/01, page 362 of 904
1 bus cycle
EXDMA EXDMA
single cycle single cycle
External
space
(CPU Cycles/Single Address Mode/BGUP = 1)
EXDMA single EXDMA single
transfer cycle transfer cycle
EXDMA EXDMA
CPU cycle
single cycle single cycle
External
space
Last transfer 1 cycle
cycle
EXDMA single
transfer cycle
Bus
release
Last transfer cycle
EXDMA
CPU cycle
single cycle
Other channel EXDMA cycle
CPU cycle
External
space
Bus
release