Operation Timing; Input/Output Timing - Hitachi H8S/2378, H8S/2378R Series Hardware Manual

16 bit single-chip microcomputer
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11.9

Operation Timing

11.9.1

Input/Output Timing

TCNT Count Timing: Figure 11.30 shows TCNT count timing in internal clock operation, and
figure 11.31 shows TCNT count timing in external clock operation.
φ
Internal clock
TCNT
input clock
TCNT
Figure 11.30 Count Timing in Internal Clock Operation
φ
External clock
TCNT
input clock
TCNT
Figure 11.31 Count Timing in External Clock Operation
Output Compare Output Timing: A compare match signal is generated in the final state in
which TCNT and TGR match (the point at which the count value matched by TCNT is updated).
When a compare match signal is generated, the output value set in TIOR is output at the output
compare output pin. After a match between TCNT and TGR, the compare match signal is not
generated until the (TIOC pin) TCNT input clock is generated.
Figure 11.32 shows output compare output timing.
Falling edge
N – 1
N
Falling edge
N – 1
N
Rising edge
N + 1
Rising edge
Falling edge
N + 1
Rev. 1.0, 09/01, page 557 of 904
N + 2
N + 2

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