4.7
Stack Status after Exception Handling
Figure 4.3 shows the stack after completion of trap instruction exception handling and interrupt
exception handling.
(a) Normal Modes
(b) Advanced Modes
Note: 1.
Rev. 1.0, 09/01, page 70 of 904
2
*
SP
CCR*
PC (16 bits)
Interrupt control mode 0
SP
PC (24 bits)
Interrupt control mode 0
Ignored on return.
2.
Normal modes are not available in this LSI.
Figure 4.3 Stack Status after Exception Handling
SP
CCR
1
SP
CCR
EXR
1
Reserved*
CCR
1
CCR*
PC (16 bits)
Interrupt control mode 2
EXR
1
Reserved*
CCR
PC (24 bits)
Interrupt control mode 2