Hitachi H8S/2378, H8S/2378R Series Hardware Manual page 723

Serial clock
Serial data
TDRE
TEND
TXI interrupt
request generated
Figure 15.16 Sample SCI Transmission Operation in Clocked Synchronous Mode
Transfer direction
Bit 0 Bit 1
Data written to TDR
and TDRE flag
cleared to 0 in TXI
interrupt handling routine
1 frame
Bit 7 Bit 0 Bit 1
TXI interrupt
request generated
Rev. 1.0, 09/01, page 679 of 904
Bit 6 Bit 7
TEI interrupt
request generated