Table 11.22 TIOR_1
Bit 3
Bit 2
Bit 1
IOA3
IOA2
IOA1
0
0
0
1
1
0
1
1
0
0
1
1
x
Legend: x: Don't care
Rev. 1.0, 09/01, page 518 of 904
Description
Bit 0
TGRA_1
IOA0
Function
0
Output
compare
1
register
0
1
0
1
0
1
0
Input
capture
register
1
x
x
TIOCA1 Pin Function
Output disabled
Initial output is 0 output
0 output at compare match
Initial output is 0 output
1 output at compare match
Initial output is 0 output
Toggle output at compare match
Output disabled
Initial output is 1 output
0 output at compare match
Initial output is 1 output
1 output at compare match
Initial output is 1 output
Toggle output at compare match
Capture input source is TIOCA1 pin
Input capture at rising edge
Capture input source is TIOCA1 pin
Input capture at falling edge
Capture input source is TIOCA1 pin
Input capture at both edges
Capture input source is TGRA_0 compare
match/input capture
Input capture at generation of channel 0/TGRA_0
compare match/input capture