Usage Notes; Contention Between Tcnt Write And Clear; Contention Between Tcnt Write And Increment - Hitachi H8S/2378, H8S/2378R Series Hardware Manual

13.8

Usage Notes

13.8.1

Contention between TCNT Write and Clear

If a timer counter clock pulse is generated during the T
takes priority, so that the counter is cleared and the write is not performed.
Figure 13.10 shows this operation.
ø
Address
Internal write signal
Counter clear signal
TCNT
Figure 13.10 Contention between TCNT Write and Clear
13.8.2

Contention between TCNT Write and Increment

If a timer counter clock pulse is generated during the T
takes priority and the counter is not incremented.
Figure 13.11 shows this operation.
Rev. 1.0, 09/01, page 606 of 904
state of a TCNT write cycle, the clear
2
TCNT write cycle by CPU
T T
1
TCNT address
N
state of a TCNT write cycle, the write
2
2
H'00