Repeat Mode - Hitachi H8S/2378, H8S/2378R Series Hardware Manual

Idle mode setting
Set DMABCRH
Set transfer source
and transfer destination
addresses
Set number of transfers
Set DMACR
Read DMABCRL
Set DMABCRL
Idle mode
7.5.4

Repeat Mode

Repeat mode can be specified by setting the RPE bit in DMACR to 1, and clearing the DTIE bit in
DMABCRL to 0. In repeat mode, MAR is updated after each byte or word transfer in response to
a single transfer request, and this is executed the number of times specified in ETCRL. On
completion of the specified number of transfers, MAR and ETCRL are automatically restored to
[1] Set each bit in DMABCRH.
[1]
[2] Set the transfer source address and transfer
[3] Set the number of transfers in ETCR.
[4] Set each bit in DMACR.
[2]
[3]
[4]
[5] Read the DTE bit in DMABCRL as 0.
[6] Set each bit in DMABCRL.
[5]
[6]
Figure 7.6 Example of Idle Mode Setting Procedure
• Clear the FAE bit to 0 to select short address
mode.
• Specify enabling or disabling of internal
interrupt clearing with the DTA bit.
destination address in MAR and IOAR.
• Set the transfer data size with the DTSZ bit.
• Specify whether MAR is to be incremented or
decremented with the DTID bit.
• Set the RPE bit to 1.
• Specify the transfer direction with the DTDIR
bit.
• Select the activation source with bits DTF3 to
DTF0.
• Set the DTIE bit to 1.
• Set the DTE bit to 1 to enable transfer.
Rev. 1.0, 09/01, page 277 of 904