Interval Timer Mode - Hitachi H8S/2378, H8S/2378R Series Hardware Manual

16 bit single-chip microcomputer
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TCNT count
H'FF
H'00
WT/
TME=1
WDTOVF
signal
Internal reset signal *
Legend
IT
: Timer mode select bit
WT/
TME
: Timer enable bit
Notes: 1. If TCNT overflows when the RSTE bit is set to 1, an internal reset signal is generated.
2. 130 states when the RSTE bit is cleared to 0.
14.4.2

Interval Timer Mode

To use the WDT as an interval timer, set the WT/,7 bit to 0 and TME bit in TCSR to 1.
When the WDT is used as an interval timer, an interval timer interrupt (WOVI) is generated each
time the TCNT overflows. Therefore, an interrupt can be generated at intervals.
When the TCNT overflows in interval timer mode, an interval timer interrupt (WOVI) is requested
at the same time the OVF bit in the TCSR is set to 1.
IT
=1
H'00 written
to TCNT
1
Figure 14.2 Operation in Watchdog Timer Mode
Overflow
WT/
WOVF=1
TME=1
WDTOVF
and
internal reset are
generated
132 states *
2
518 states
Rev. 1.0, 0901, page 619 of 904
Time
IT
=1
H'00 written
to TCNT

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