Refresh Timer Counter (Rtcnt); Refresh Time Constant Register (Rtcor); Bus Control; Area Division - Hitachi H8S/2378, H8S/2378R Series Hardware Manual

6.3.11

Refresh Timer Counter (RTCNT)

RTCNT is an 8-bit readable/writable up-counter. RTCNT counts up using the internal clock
selected by bits RTCK2 to RTCK0 in REFCR.
When RTCNT matches RTCOR (compare match), the CMF flag in REFCR is set to 1 and
RTCNT is cleared to H'00. If the RFSHE bit in REFCR is set to 1 at this time, a refresh cycle is
started. If the RFSHE bit is cleared to 0 and the CMIE bit in REFCR is set to 1, a compare match
interrupt (CMI) is generated.
RTCNT is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
6.3.12

Refresh Time Constant Register (RTCOR)

RTCOR is an 8-bit readable/writable register that sets the period for compare match operations
with RTCNT.
The values of RTCOR and RTCNT are constantly compared, and if they match, the CMF flag in
REFCR is set to 1 and RTCNT is cleared to H'00.
RTCOR is initialized to H'FF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
6.4

Bus Control

6.4.1

Area Division

The bus controller divides the 16-Mbyte address space into eight areas, 0 to 7, in 2-Mbyte units,
and performs bus control for external address space in area units. Chip select signals (&63 to &6:)
can be output for each area. In normal mode, a part of area 0, 64-kbyte address space, is
controlled. Figure 6.6 shows an outline of the memory map.
Note: Normal mode is not available in this LSI.
Rev. 1.0, 09/01, page 135 of 904