Hitachi H8S/2378, H8S/2378R Series Hardware Manual page 231

ø
SDRAMø
Address bus
Precharge-sel
Read
CKE
DQMU, DQML
Data bus
Write
CKE
DQMU, DQML
Data bus
Figure 6.45 CAS Latency Control Timing (SDWCD = 0, CAS Latency 3)
T T
p r
Column address Row address
Row address
PALL ACTV
PALL ACTV
T T
c1 cl1
Column address
High
READ
High
NOP WRIT
Rev. 1.0, 09/01, page 187 of 904
T T
cl2 c2
NOP
NOP