Module Stop Control Registers H And L (Mstpcrh, Mstpcrl) - Hitachi H8S/2378, H8S/2378R Series Hardware Manual

22.1.2

Module Stop Control Registers H and L (MSTPCRH, MSTPCRL)

MSTPCR performs module stop mode control.
Setting a bit to 1, the corresponding module enters module stop mode, while clearing the bit to 0
clears the module stop mode.
MSTPCRH
Bit Bit Name
15 ACSE
14 MSTP14
13 MSTP13
12 MSTP12
11 MSTP11
10 MSTP10
9 MSTP9
8 MSTP8
MSTPCRL
Bit Bit Name
7 MSTP7
6 MSTP6
5 MSTP5
4 MSTP4
3 MSTP3
2 MSTP2
1 MSTP1
0 MSTP0
Rev. 1.0, 09/01, page 806 of 904
Initial Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
1 R/W
1 R/W
1 R/W
1 R/W
Initial Value R/W
1 R/W
1 R/W
1 R/W
1 R/W
1 R/W
1 R/W
1 R/W
1 R/W
Module
All-Module-Clocks-Stop Mode Enable
Enables or disables all-module-clocks-stop mode,
in which, when the CPU executes a SLEEP
instruction after module stop mode has been set
for all the on-chip peripheral functions controlled by
MSTPCR or the on-chip peripheral functions
except the TMR.
0: All-module-clocks-stop mode disabled
1: All-module-clocks-stop mode enabled
EXDMA controller (EXDMAC)
DMA controller (DMAC)
Data transfer controller (DTC)
16-bit timer-pulse unit (TPU)
Programmable pulse generator (PPG)
D/A converter (channels 0 and 1)
D/A converter (channels 2 and 3)
Module
D/A converter (channels 4 and 5)
A/D converter
Serial communication interface 4 (SCI_4)
Serial communication interface 3 (SCI_3)
Serial communication interface 2 (SCI_2)
Serial communication interface 1 (SCI_1)
Serial communication interface 0 (SCI_0)
8-bit timer (TMR)