Hitachi H8S/2378, H8S/2378R Series Hardware Manual page 229

ø
SDRAMø
Address bus
Precharge-sel
Read
CKE
DQMU, DQML
Data bus
Write
CKE
DQMU, DQML
Data bus
Figure 6.44 Basic Access Timing of Synchronous DRAM (CAS Latency 1)
T T
p r
Column address Row address
Row address
PALL ACTV
PALL ACTV
T
c1
Column address
High
READ
High
NOP
Rev. 1.0, 09/01, page 185 of 904
T
c2
NOP
WRIT