Interrupt Control Register (Intcr); Interrupt Priority Registers A To K (Ipra To Iprk) - Hitachi H8S/2378, H8S/2378R Series Hardware Manual

5.3.1

Interrupt Control Register (INTCR)

INTCR selects the interrupt control mode, and the detected edge for NMI.
Bit Bit Name
−
7
−
6
5 INTM1
4 INTM0
3 NMIEG
−
2 to 0
5.3.2

Interrupt Priority Registers A to K (IPRA to IPRK)

IPR are eleven 16-bit readable/writable registers that set priorities (levels 7 to 0) for interrupts
other than NMI.
The correspondence between interrupt sources and IPR settings is shown in table 5.2 (Interrupt
Sources, Vector Addresses, and Interrupt Priorities). Setting a value in the range from H'0 to H'7
in the 3-bit groups of bits 14 to 12, 10 to 8, 6 to 4, and 2 to 0 sets the priority of the corresponding
interrupt. IPR should be read in word size.
Rev. 1.0, 09/01, page 76 of 904
Initial Value R/W
−
0
−
0
0 R/W
0 R/W
0 R/W
−
0
Description
Reserved
These bits are always read as 0 and cannot be
modified.
Interrupt Control Select Mode 1 and 0
These bits select either of two interrupt control
modes for the interrupt controller.
00: Interrupt control mode 0
Interrupts are controlled by I bit.
01: Setting prohibited.
10: Interrupt control mode 2
Interrupts are controlled by bits I2 to I0, and
IPR.
11: Setting prohibited.
NMI Edge Select
Selects the input edge for the NMI pin.
0: Interrupt request generated at falling edge of
NMI input
1: Interrupt request generated at rising edge of
NMI input
Reserved
These bits are always read as 0 and cannot be
modified.