External Trigger Input Timing - Hitachi H8S/2378, H8S/2378R Series Hardware Manual

Item Symbol
A/D conversion t
D
start delay time
Input sampling t
SPL
time
A/D conversion t
CONV
time
Note: Values in the table are the number of states.
Table 17.4 A/D Conversion Time (Scan Mode)
CKS1
0
1
17.4.4

External Trigger Input Timing

A/D conversion can be externally triggered. When the TRGS1 and TRGS0 bits are set to 11 in
ADCR, external trigger input is enabled at the $'75* pin. A falling edge at the $'75* pin sets
the ADST bit to 1 in ADCSR, starting A/D conversion. Other operations, in both single and scan
modes, are the same as when the bit ADST has been set to 1 by software. Figure 17.3 shows the
timing.
ø
Internal trigger signal
ADST
Rev. 1.0, 09/01, page 746 of 904
CKS1 = 0
CKS0 = 0
Min Typ Max
18 — 33
— 127 —
515 — 530
CKS0
0
1
0
1
Figure 17.3 External Trigger Input Timing
CKS0 = 1
Min Typ Max Min Typ Max
10 — 17 6
— 63 — —
259 — 266 131 —
Conversion Time (State)
512 (Fixed)
256 (Fixed)
128 (Fixed)
64 (Fixed)
A/D conversion
CKS1 = 1
CKS0 = 0 CKS0 = 1
Min Typ Max
— 9 4
31 — —
134 67
— 5
15 —
— 68