Hitachi H8S/2378, H8S/2378R Series Hardware Manual page 189

8-Bit, 3-State Access Space: Figure 6.11 shows the bus timing for an 8-bit, 3-state access space.
When an 8-bit access space is accessed, the upper half (D15 to D8) of the data bus is used. The
/:5 pin is always fixed high. Wait states can be inserted.
ø
Address bus
D15 to D8
Read
D7 to D0
Write
D15 to D8
D7 to D0
Notes: 1. n = 0 to 7
2. When RDNn = 0
Figure 6.11 Bus Timing for 8-Bit, 3-State Access Space
Bus cycle
T T
1 2
High
Valid
High impedance
T
3
Valid
Invalid
Rev. 1.0, 09/01, page 145 of 904