%$&.
%$&.
%$&.
PG5/%$&.
The pin function is switched as shown below according to the operating mode, bit EXPE, bit
BRLE, and bit PG5DDR.
Operating
1, 2, 4, 5, 6
mode
EXPE
BRLE
PG5DDR
0
Pin
PG5
function
input
%5(42
%5(42
%5(42
PG4/%5(42
The pin function is switched as shown below according to the operating mode, bit EXPE, bit
BRLE, bit BREQO, and bit PG4DDR.
Operating
1, 2, 4, 5, 6
mode
EXPE
BRLE
0
BREQO
—
PG4DDR
0
1
Pin
PG4
PG4
function
input
output
Rev. 1.0, 09/01, page 486 of 904
—
0
1
1
—
%$&.
PG5
PG5
output
output
input
—
1
0
1
0
1
—
%5(42
PG4
PG4
PG4
input
output
output
input
7
0
—
0
1
0
PG5
PG5
output
input
7
0
—
0
—
—
0
1
0
1
PG4
PG4
PG4
output
input
output
1
0
1
1
—
%$&.
PG5
output
output
1
1
0
1
0
1
—
%5(42
PG4
PG4
input
output
output