Hitachi H8S/2378, H8S/2378R Series Hardware Manual page 175

Address bus
Precharge-sel
SDWCD 0
,
Data bus
Address bus
Precharge-sel
SDWCD 1
,
Data bus
Figure 6.5 CAS Latency Control Cycle Disable Timing during Continuous Synchronous
T
p
ø
Column address Row address
Row address
CKE
PALL
T
p
Column address
Row address
Row address
CKE
PALL
DRAM Space Write Access (for CAS Latency 2)
T T
r c1
Column address
High
ACTV NOP
T T
r c1
Column address
High
ACTV NOP
Rev. 1.0, 09/01, page 131 of 904
T T
cl c2
WRIT NOP
T
c2
WRIT