Erase Block Register 1 (Ebr1); Erase Block Register 2 (Ebr2) - Hitachi H8S/2378, H8S/2378R Series Hardware Manual

Bit Bit Name
7 FLER
6 —
to
0
20.5.3

Erase Block Register 1 (EBR1)

EBR1 specifies the flash memory erase area block. EBR1 is initialized to H'00 when the SWE bit
in FLMCR1 is 0. Set only one bit in EBR1 and EBR2 together (do not set more than one bit at the
same time). Setting more than one bit will automatically clear all EBR1 and EBR2 bits to 0. For
details, see table 20.3, Erase Blocks.
Bit Bit Name
7 EB7
6 EB6
5 EB5
4 EB4
3 EB3
2 EB2
1 EB1
0 EB0
20.5.4

Erase Block Register 2 (EBR2)

EBR2 specifies the flash memory erase area block. EBR2 is initialized to H'00 when the SWE bit
in FLMCR1 is 0. Set only one bit in EBR2 and EBR1 together (do not set more than one bit at the
same time). Setting more than one bit will automatically clear all EBR1 and EBR2 bits to 0. For
details, see table 19.3, Erase Blocks.
Rev. 1.0, 09/01, page 774 of 904
Initial Value R/W
0 R
0 R
Initial Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
Description
Indicates that an error has occurred during an
operation on flash memory (programming or
erasing). When FLER is set to 1, flash memory
goes to the error-protection state.
See 20.9.3 Error Protection, for details.
Reserved
These bits always read 0.
Description
When this bit is set to 1, 4 kbytes of EB7 are to be
erased.
When this bit is set to 1, 4 kbytes of EB6 are to be
erased.
When this bit is set to 1, 4 kbytes of EB5 are to be
erased.
When this bit is set to 1, 4 kbytes of EB4 are to be
erased.
When this bit is set to 1, 4 kbyte of EB3 is to be
erased.
When this bit is set to 1, 4 kbyte of EB2 is to be
erased.
When this bit is set to 1, 4 kbyte of EB1 is to be
erased.
When this bit is set to 1, 4 kbyte of EB0 is to be
erased.