Section 14 Watchdog Timer; Features - Hitachi H8S/2378, H8S/2378R Series Hardware Manual

Section 14 Watchdog Timer

The watchdog timer (WDT) is an 8-bit timer that outputs an overflow signal (:'729)) if a
system crash prevents the CPU from writing to the timer counter, thus allowing it to overflow.
At the same time, the WDT can also generate an internal reset signal.
When this watchdog function is not needed, the WDT can be used as an interval timer. In interval
timer operation, an interval timer interrupt is generated each time the counter overflows.
The block diagram of the WDT is shown in figure 14.1.
14.1

Features

• Selectable from eight counter input clocks
• Switchable between watchdog timer mode and interval timer mode
In watchdog timer mode
• If the counter overflows, the WDT outputs :'729). It is possible to select whether or not
the entire chip is reset at the same time.
In interval timer mode
• If the counter overflows, the WDT generates an interval timer interrupt (WOVI).
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