Hitachi H8S/2378, H8S/2378R Series Hardware Manual page 671

16 bit single-chip microcomputer
Table of Contents

Advertisement

RDR
RxD
RSR
TxD
SCK
Legend
RSR
: Receive shift register
RDR
: Receive data register
TSR
: Transmit shift register
TDR
: Transmit data register
SMR
: Serial mode register
SCR
: Serial control register
SSR
: Serial status register
SCMR : Smart card mode register
BRR
: Bit rate register
SEMR
: Serial extension mode register (only in SCI_2)
Module data bus
SCMR
TDR
SSR
SCR
SMR
TSR
SEMR
Transmission/
reception control
Parity generation
Parity check
Figure 15.1 Block Diagram of SCI
BRR
Baud rate
generator
Clock
External clock
TEI
TXI
RXI
ERI
Rev. 1.0, 09/01, page 627 of 904
Internal
data bus
φ
φ/4
φ/16
φ/64
Average transfer
rate generator
(SCI_2)
10.667 MHz operation
• 115.152 kbps
• 460.606 kbps
16 MHz operation
• 115.196 kbps
• 460.784 kbps
• 720 kbps
32 MHz operation
• 720 kbps

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents