ST STM32L4+ Series Reference Manual page 1768

Universal synchronous/asynchronous receiver transmitter (USART/UART)
Interrupt event
Transmit FIFO threshold
reached
CTS interrupt
Transmission Complete
Transmission Complete
Before Guard Time
Receive data register not
empty (data ready to be read)
Receive FIFO Not Empty
Receive FIFO Full
Receive FIFO threshold
reached
Overrun error detected
Idle line detected
Parity error
LIN break
Noise error, Overrun error
and Framing Error in
multibuffer communication.
Character match
Receiver timeout
1768/2301
Table 356. USART interrupt requests (continued)
Enable
Event
Control
flag
bit
TXFT TXFTIE
CTSIF CTSIE
TC TCIE
TCBGT TCBGTIE
RXNE RXNEIE
RXFNE RXFNEIE
(1)
RXFF RXFFIE
RXFT RXFTIE
RX-
ORE NEIE/RX
FNEIE
IDLE IDLEIE
PE PEIE
LBDF LBDIE
NE or
ORE or EIE
FE
CMF CMIE
RTOF RTOFIE
RM0432 Rev 6
Interrupt clear method
TXFT is cleared by hardware
when the TXFIFO content is
less than the programmed
threshold
CTSIF cleared by software by
setting CTSCF bit.
TC cleared when a data is
written in TDR or by setting
TCCF bit.
TCBGT cleared when a data is
written in TDR or by setting
TCBGTCF bit.
RXNE cleared by reading RDR
or by setting RXFRQ bit.
RXFNE cleared when the
RXFIFO is empty or by setting
RXFRQ bit.
RXFF cleared when the
RXFIFO contains at least one
data.
RXFT is cleared by hardware
when the RXFIFO content is
less than the programmed
threshold
ORE cleared by setting
ORECF bit.
IDLE cleared by setting
IDLECF bit.
PE cleared by setting PECF
bit.
LBDF cleared by setting
LBDCF bit.
NE cleared by setting NECF
bit.
ORE cleared by setting
ORECF bit.
FE flag cleared by setting
FECF bit.
CMF cleared by setting CMCF
bit.
RTOF cleared by setting
RTOCCF bit.
RM0432
Interrupt activated
usart_it usart_wkup
YES YES
YES NO
YES NO
YES NO
YES YES
YES YES
YES YES
YES YES
YES NO
YES NO
YES NO
YES NO
YES NO
YES NO
YES NO