ST STM32L4+ Series Reference Manual page 1769

RM0432
Interrupt event
End of Block
Wakeup from low-power
mode
SPI slave underrun error
Transmit FIFO threshold
reached
Receive FIFO threshold
reached
1. RXFF flag is asserted if the USART receives n+1 data (n being the RXFIFO size): n data in the RXFIFO and 1 data in
USART_RDR. In Stop mode, USART_RDR is not clocked. As a result, this register is not written and once n data are
received and written in the RXFIFO, the RXFF interrupt is asserted (RXFF flag is not set).
Universal synchronous/asynchronous receiver transmitter (USART/UART)
Table 356. USART interrupt requests (continued)
Enable
Event
Control
flag
bit
EOBF EOBIE
WUF WUFIE
UDR EIE
TXFT TXFTIE
RXFT RXFTIE
RM0432 Rev 6
Interrupt clear method
EOBF is cleared by setting
EOBCF bit.
WUF is cleared by setting
WUCF bit.
UDR is cleared by setting
UDRCF bit.
TXFT is cleared by hardware
when the TXFIFO content is
less than the programmed
threshold
RXFT is cleared by hardware
when the RXFIFO content is
less than the programmed
threshold.
Interrupt activated
usart_it usart_wkup
YES NO
YES YES
YES NO
YES YES
YES YES
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