Wait State Control Register 3 (Wcr3) - Hitachi SH7032 Hardware Manual

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Table 8.6
Single-Mode DMA Memory Write Cycle States (External Memory Space)
WAIT Pin Input
Bits 15–8:
DWW7–DWW0
Signal
0
Not sampled during
single-mode DMA
memory write cycle *
1
Sampled during
single-mode DMA
memory write cycle
(Initial value)
Note: * Sampled in the address/data multiplexed I/O space.
8.2.4

Wait State Control Register 3 (WCR3)

Wait state control register 3 is a 16-bit read/write register that controls WAIT pin pull-up and the
insertion of long wait states. WCR3 is initialized to H'F800 by a power-on reset. It is not
initialized by a manual reset or in standby mode.
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
• Bit 15 (Wait Pin Pull-Up Control (WPU)): WPU controls whether the WAIT pin is pulled up
or not. When cleared to 0, the pin is not pulled up; when set to 1, it is pulled up.
Bit 15: WPU
0
1
External Memory
Space
Areas 1, 3–5,7: 1 state,
fixed
Areas 0, 2, 6: 1 state +
long wait state
Areas 1, 3–5, 7: 2 states
+ wait state from WAIT
Areas 0, 2, 6: 1 state +
long wait state + wait
state from WAIT
15
14
WPU
A02LW1 A02LW0 A6LW1
1
1
R/W
R/W
R/W
7
6
0
0
Description
WAIT pin is not pulled up
WAIT pin is pulled up
Single-Mode DMA Memory Write Cycle States
(External Memory Space)
13
12
11
A6LW0
1
1
1
R/W
R/W
5
4
3
0
0
0
Multiplexed
DRAM Space
I/O
Column address
4 states +
cycle: 1 state,
wait state
from WAIT
fixed (short pitch)
Column address
cycle: 2 states +
wait state from
WAIT (long pitch)
10
9
0
0
2
1
0
0
(Initial value)
8
0
0
0
113

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