Section 15 Pin Function Controller (Pfc); Overview - Hitachi SH7032 Hardware Manual

Superh risc engine
Table of Contents

Advertisement

Section 15 Pin Function Controller (PFC)

15.1

Overview

The pin function controller (PFC) is composed of registers for selecting the function of
multiplexed pins and the direction of input/output. The pin function and input/output direction can
be selected for each pin individually without regard to the operating mode of the chip. Table 15.1
lists the multiplexed pins.
Table 15.1 List of Multiplexed Pins
Function 1
Port
(Related Module)
A
PA15 I/O (port)
A
PA14 I/O (port)
A
PA13 I/O (port)
A
PA12 I/O (port)
A
PA11 I/O (port)
A
PA10 I/O (port)
A
PA9 I/O (port)
A
PA8 I/O (port)
A
PA7 I/O (port)
A
PA6 I/O (port)
A
PA5 I/O (port)
A
PA4 I/O (port)
A
PA3 I/O (port)
A
PA2 I/O (port)
A
PA1 I/O (port)
A
PA0 I/O (port)
Function 2
Function 3
(Related Module)
(Related Module)
IRQ3 input (INTC)
DREQ1 input
(DMAC)
IRQ2 input (INTC)
DACK1 output (DMAC) —
IRQ1 input (INTC)
TCLKB input (ITU)
IRQ0 input (INTC)
TCLKA input (ITU)
DPH I/O (D bus)
TIOCB1 I/O (ITU)
DPL I/O (D bus)
TIOCA1 I/O (ITU)
AH output (BSC)
ADTRG input (A/D)
BREQ input (system)
BACK output (system)
RD output (BSC)
WRH output (BSC)
(LBS output (BSC)) *
1
WRL output (BSC)
(WR output (BSC)) *
1
CS7 output (BSC)
WAIT input (BSC)
CS6 output (BSC)
TIOCB0 I/O (ITU)
CS5 output (BSC)
RAS output (BSC)
CS4 output (BSC)
TIOCA0 I/O (ITU)
Function 4
Pin No.
(Related Module)
(FP-112)
69
68 *
DREQ0 input (DMAC)
67
DACK0 output (DMAC) 66 *
65
64
IRQOUT output (INTC) 63
62
60
59
58
57
56
55
54
53
Pin No.
(TFP-120)
74
3
3
73 *
72
3
71 *
3
70
69
68
67
65
64
63
62
59
58
57
56
425

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents