Hitachi SH7032 Hardware Manual page 319

An example of buffer operation in complementary PWM mode between GRB3 and BRB3 is
shown in figure 10.52. By making GRB3 larger than GRA3 using buffer operation, a PWM
waveform with a duty cycle of 0% is generated. The transfer from BRB to GRB occurs upon
TCNT3 and GRA compare match and TCNT4 underflow.
TCNT3 and TCNT4 values
H' 1FFF
GRA3
H' 0999
H' 0000
BRB3
H' 0999
GRB3
H' 0999
TIOCA3
TIOCB3
Figure 10.52 Buffer Mode Operation Example 3 (Complementary PWM Mode)
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TCNT3
TCNT4
H' 1FFF
H' 0999
H' 1FFF H' 1FFF
GRB3
Time
H' 0999
H' 0999