Hitachi SH7032 Hardware Manual page 338

Table 10.20 ITU Operating Modes (Channel 2)
TSNC
Operating
Mode Sync MDF FDIR PWM
Synch- SYNC2 —
ronized = 1
preset
√
PWM —
√
Output —
compare A
function
√
Output —
compare B
function
√
Input —
capture A
function
√
Input —
capture B
function
Counter Clear Function
√
Clear at —
compare
match/
input
capture A
√
Clear at —
compare
match/
input
capture B
Synch- SYNC2 —
ronized = 1
clear
√
Phase MDF
counting = 1
√: Settable, —: Setting does not affect current mode
Note: In PWM mode, the input capture function cannot be used. When compare match A and
*
compare match B occur simultaneously, the compare match signal is inhibited.
TMDR TFCR
Reset
Comp Sync
PWM PWM Buffer
√
— — —
— PWM2 — —
= 1
— PWM2 — —
= 0
√
— — —
— PWM2 — —
= 0
— PWM2 — —
= 0
√
— — —
√
— — —
√
— — —
√ √
— —
Register Setting
TOCR
Output
Level
Select IOA
√
— —
— — —
— — IOA2 = 0,
others:
don't care
√
— —
— — IOA2 = 1,
others:
don't care
√
— —
√
— —
√
— —
√
— —
√
— —
TIOR2 TCR2
Clear
IOB Select
√ √
√ * √
√ √
√
IOB2 = 0,
others:
don't care
√ √
√
IOB2 = 1,
others:
don't care
√
CCLR1
= 0
CCLR0
= 1
√
CCLR1
= 1
CCLR0
= 0
√
CCLR1
= 1
CCLR0
= 1
√ √
Clock
Select
√
√
√
√
√
√
√
√
√
—
303