Register Descriptions; Break Address Registers (Bar) - Hitachi SH7032 Hardware Manual

6.2

Register Descriptions

6.2.1

Break Address Registers (BAR)

There are two break address registers—break address register H (BARH) and break address
register L (BARL)—that together form a single group. Both are 16-bit read/write registers. BARH
stores the upper bits (bits 31–16) of the address of the break condition. BARL stores the lower bits
(bits 15–0) of the address of the break condition. A reset initializes both BARH and BARL to
H'0000. They are not initialized in standby mode.
BARH: Break address register H.
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
• BARH Bits 15–0 (Break Address 31–16 (BA31–BA16)): BA31–BA16 store the upper bit
values (bits 31–16) of the address of the break condition.
BARL: Break address register L.
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
• BARL Bits 15–0 (Break Address 15–0 (BA15–BA0)): BA15–BA0 store the lower bit values
(bits 15–0) of the address of the break condition.
84
15 14
BA31 BA30 BA29
0 0
R/W R/W R/W
7 6
BA23 BA22 BA21
0 0
R/W R/W R/W
15 14
BA15 BA14 BA13
0 0
R/W R/W R/W
7 6
BA7 BA6 BA5
0 0
R/W R/W R/W
13 12 11
BA28 BA27
0 0 0
R/W R/W
5 4 3
BA20 BA19
0 0 0
R/W R/W
13 12 11
BA12 BA11
0 0 0
R/W R/W
5 4 3
BA4 BA3
0 0 0
R/W R/W
10 9
BA26 BA25 BA24
0 0
R/W R/W R/W
2 1
BA18 BA17 BA16
0 0
R/W R/W R/W
10 9
BA10 BA9 BA8
0 0
R/W R/W R/W
2 1
BA2 BA1 BA0
0 0
R/W R/W R/W
8
0
0
0
8
0
0
0