Hitachi SH7032 Hardware Manual page 683

The following table shows the states of bus control pins and external bus pins in accesses of
various address spaces.
Table B.2 Pin States in Address Space Accesses
On-Chip
Pin Name ROM Space
CS7–CS0
High
RAS
High
CASH
High
CASL
High
AH
Low
RD
R High
W —
WRH/LBS
R High
W —
WRL/WR
R High
W —
A0/HBS A0
A21–A1 Address
AD15–AD8 High-Z
AD7–AD0 High-Z
DPH High-Z
DPL High-Z
R: Read
W: Write
648
On-Chip 8-Bit
RAM Space Space
High High
High High
High High
High High
Low Low
High High
High High
High High
High High
High High
High High
A0 A0
Address Address
High-Z High-Z
High-Z High-Z
High-Z High-Z
High-Z High-Z
On-Chip Peripheral Modules
16-Bit Space
Upper Lower
Byte Byte
High High
High High
High High
High High
Low Low
High High
High High
High High
High High
High High
High High
A0 A0
Address Address
High-Z High-Z
High-Z High-Z
High-Z High-Z
High-Z High-Z
Word
High
High
High
High
Low
High
High
High
High
High
High
A0
Address
High-Z
High-Z
High-Z
High-Z