A.2.44
DRAM Area Control Register (DCR)
• Start Address: H'5FFFFA8
• Bus Width: 8/16/32
Register Overview:
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
15
14
CW2
RASD
TPC
0
0
R/W
R/W
R/W
7
6
—
—
0
0
—
—
13
12
11
BE
CDTY
0
0
0
R/W
R/W
5
4
3
—
—
—
0
0
0
—
—
—
10
9
MXE
MXC1
MXC0
0
0
R/W
R/W
R/W
2
1
—
—
—
0
0
—
—
—
BSC
8
0
0
0
611