Hitachi SH7032 Hardware Manual page 341

Table 10.22 ITU Operating Modes (Channel 4)
TSNC
Operating
Mode Sync MDF FDIR PWM
Synch- SYNC4 —
ronized = 1
preset
√
PWM —
√
Output —
compare A
function
√
Output —
compare B
function
√
Input —
capture A
function
√
Input —
capture B
function
Counter Clear Function
√
Clear at —
compare
match/
input
capture A
√
Clear at —
compare
match/
input
capture B
Synch- SYNC4 —
ronized = 1
clear
306
TMDR TFCR
Reset
Comp Sync
PWM PWM Buffer
√ √ * √
2
—
— PWM4 CMD1 CMD1
= 1 = 0 = 0
— PWM4 CMD1 CMD1
= 0 = 0 = 0
√
— CMD1 CMD1
= 0 = 0
— PWM4 CMD1 CMD1
= 0 = 0 = 0
— PWM4 CMD1 CMD1
= 0 = 0 = 0
√ √ *
— CMD1
= 1,
CMD0
= 0
inhib-
ited
√ √ *
— CMD1
= 1,
CMD0
= 0
inhib-
ited
√ √ *
— CMD1
= 1,
CMD1
= 0
inhib-
ited
Register Setting
TOCR
Output
Level
Select IOA
√ √
—
√
— —
√
— IOA2 = 0,
others:
don't care
√ √
—
√
— IOA2 = 1,
others:
don't care
√ √
—
√ √
3
—
√ √
3
—
√ √
3
—
TIOR4 TCR4
Clear
IOB Select
√ √
√ * √
1
√ √
√
IOB2 = 0,
others:
don't care
√ √
√
IOB2 = 1,
others:
don't care
√
CCLR1
= 0
CCLR0
= 1
√
CCLR1
= 1
CCLR0
= 0
√
CCLR1
= 1
CCLR0
= 1
Clock
Select
√
√
√
√
√
√
√
√
√