Hitachi SH7032 Hardware Manual page 64

Table 2.9 Instruction Formats (cont)
Instruction Format
nm format
15
xxxx nnnn
mmmm
md format
15
xxxx xxxx mmmm
nd4 format
15
xxxx xxxx nnnn
nmd format
15
xxxx
nnnn mmmm
Source Operand
mmmm: Register
direct
0
mmmm: Register
xxxx direct
mmmm: Register
indirect with post-
increment (multiply-
and-accumulate)
nnnn: Register
indirect with post-
increment (multiply-
and-accumulate)*
mmmm: Register
indirect with
post-increment
mmmm: Register
direct
mmmm: Register
direct
mmmmdddd: Register
indirect with
0
displacement
dddd
R0 (Register direct) nnnndddd:
0
dddd
mmmm: Register
direct
0
dddd
mmmmdddd: Register
indirect with
displacement
Destination
Operand Example
nnnn: Register
ADD
direct
nnnn: Register
MOV.L
indirect
MACH, MACL
MAC.W
@Rm+,@Rn+
nnnn: Register
MOV.L
direct
nnnn: Register
MOV.L
indirect with
pre-decrement
nnnn: Indexed
MOV.L
register indirect
Rm,@(R0,Rn)
R0 (Register
MOV.B
direct)
@(disp,Rn),R0
MOV.B
Register indirect
R0,@(disp,Rn)
with displacement
nnnndddd:
MOV.L
Register indirect
Rm,@(disp,Rn)
with displacement
nnnn: Register
MOV.L
direct
@(disp,Rm),Rn
Rm,Rn
Rm,@Rn
@Rm+,Rn
Rm,@-Rn
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